Electrical Design & Analysis Engineer 

Description:

Engineer the Technology That Powers the Future of Aerospace – Electrical Design & Analysis Engineer 

Location: El Segundo, CA | Schedule: 1st shift, start time 8am – 4:30pm | Pay Rates: $84.24 - $105.42/hour 

 

PDS Tech Commercial is partnering with a global leader in the aerospace industry to find an exceptional Electrical Design & Analysis Engineer who is passionate about ASIC/FPGA verification, cutting-edge hardware development, and advancing the next generation of aerospace systems. 

In this highly technical role, you'll help develop and verify mission-critical digital hardware that powers advanced aerospace platforms. Working alongside world-class engineering teams, you'll design robust verification environments, validate complex ASIC/FPGA architectures, and contribute to innovative technologies that demand precision, performance, and reliability. 

If you thrive on solving complex engineering challenges and enjoy working at the forefront of aerospace innovation, this is your opportunity to make a lasting impact. 

What You'll Do 

As an Electrical Design & Analysis Engineer, you'll be responsible for developing comprehensive verification solutions that ensure the quality and performance of advanced ASIC and FPGA designs. 

Your responsibilities will include: 

  • Design and implement ASIC/FPGA verification environments using SystemVerilog and Universal Verification Methodology (UVM). 

  • Develop self-checking, reusable testbenches utilizing Object-Oriented Programming concepts, including inheritance and polymorphism. 

  • Build verification components such as drivers, monitors, predictors, scoreboards, and sequencers. 

  • Develop Functional Coverage Models and perform Code Coverage analysis to ensure complete design verification. 

  • Create and execute regression test suites while tracking coverage metrics and verification progress. 

  • Support FPGA prototyping, hardware integration, and system validation activities based on program requirements. 

  • Collaborate with design, systems, and software engineering teams to develop accurate, verifiable ASIC/FPGA specifications. 

  • Analyze simulation results, debug verification issues using waveform analysis tools, and drive resolution of design discrepancies. 

  • Utilize revision control systems and Linux-based development environments to support collaborative engineering efforts. 

  • Contribute to the successful delivery of production-quality ASIC/FPGA designs. 

Required Qualifications 

  • Bachelor's degree in Engineering (Electrical, Mechanical, or Aeronautical), Computer Science, Computer Engineering, Data Science, Mathematics, Physics, Chemistry, or an equivalent technical discipline. 

  • Proven experience with ASIC and FPGA verification methodologies. 

  • Strong expertise in SystemVerilog, UVM, and SystemVerilog Assertions (SVA). 

  • Experience defining ASIC/FPGA verification architectures and supporting production design releases. 

  • Demonstrated ability to develop reusable, self-checking verification environments from the ground up. 

  • Experience implementing comprehensive verification test plans. 

  • Strong understanding of Object-Oriented Programming concepts, including inheritance and polymorphism. 

  • Experience developing Functional Coverage Models and achieving Code Coverage closure. 

  • Ability to collaborate with design and systems engineering teams to establish robust verification strategies. 

  • Experience using waveform debugging tools. 

  • Proficiency with Linux operating systems. 

  • Experience with revision control systems such as Git, SVN, or CVS. 

Preferred Qualifications 

  • 15+ years of related engineering experience or an equivalent combination of education and experience. 

  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. 

  • Experience with hardware integration and testing of ASIC/FPGA designs. 

  • Experience using hardware emulation platforms, particularly Cadence Palladium. 

  • Knowledge of high-speed serial interfaces such as JESD204C, PCIe, and Ethernet. 

  • Proficiency with scripting languages including Python, Perl, Make, or similar automation tools. 

  • Experience with space-qualified electronic design techniques and radiation mitigation strategies. 

  • Demonstrated track record of first-pass ASIC design success. 

Build the Future of Aerospace Technology 

If you're an experienced Electrical Design & Analysis Engineer with expertise in ASIC/FPGA verification and a passion for developing high-performance aerospace systems, we want to hear from you. 

Apply today and bring your engineering expertise to PDS Tech Commercial, where you'll help deliver the technologies powering the future of aerospace. 

This position requires use of information or access to facilities subject to the International Traffic in Arms Regulations (ITAR) and/or Export Administration Regulations (EAR). These regulations may limit access of controlled technologies: 1) to U.S. Persons, including U.S. Citizens, lawful permanent residents, and other narrow categories including refugees and asylees, or 2) to certain foreign nationals that have received an export license.        



Pay Details: $84.24 to $105.42 per hour

Benefit offerings available for our associates include medical, dental, vision, life insurance, short-term disability, additional voluntary benefits, EAP program, commuter benefits and a 401K plan. Our benefit offerings provide employees the flexibility to choose the type of coverage that meets their individual needs. In addition, our associates may be eligible for paid leave including Paid Sick Leave or any other paid leave required by Federal, State, or local law, as well as Holiday pay where applicable.

Equal Opportunity Employer/Veterans/Disabled

Military connected talent encouraged to apply

To read our Candidate Privacy Information Statement, which explains how we will use your information, please navigate to https://www.pdstech.com/candidate-privacy

The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
  • The California Fair Chance Act
  • Los Angeles City Fair Chance Ordinance
  • Los Angeles County Fair Chance Ordinance for Employers
  • San Francisco Fair Chance Ordinance


Massachusetts Candidates Only: It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.



 
Job Number: US_EN_33_022581_2572986
Job Location: El Segundo, CA
Per Diem: --
Overtime: --
Duration: indef
Start Date: ASAP
Input Date: 07/16/2026
Firm Name: PDS TECH COMMERCIAL, INC
Attention:
Address: 545 E JOHN CARPENTER FWY STE 950
City, State: IRVING, TX 75062
Phone: 214/647-9600
800 Phone: 800/270-4737
Email: Client.Services@pdstech.com
Website: Go To PDS Tech Commercial Website
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