Description:
Chipton-Ross is seeking 2 ASIC/FPGA Verification Engineers for a contract opportunity in Mountain View, CA, El Segundo, CA or Mesa, AZ.
BASIC QUALIFICATIONS (REQUIRED SKILLS/EXPERIENCE): Bachelors degree in EE, CE, CS, or related field (or equivalent experience). Experience with ASIC/FPGA verification using SystemVerilog and UVM. Ability to build self-checking testbenches and use object-oriented SV features. Familiarity with functional coverage and code coverage closure. Comfortable in Linux and using scripting tools. Regular and predictable attendance is required
POSITION RESPONSIBILITIES: Write SystemVerilog/UVM testbenches to verify ASICs and FPGAs. Develop self-checking, reusable UVM components: drivers, monitors, scoreboards, sequencers. Build functional coverage models and close code coverage gaps. Create tests that verify DSP and third-party IP integration. Run simulations, linting, CDC checks, static timing checks, and gate-level regressions. Use scripting (Python/Perl/Make) and revision control (git/svn) to automate flows. Support FPGA bring-up, hardware emulation/prototyping, and hardware integration tests. Collaborate with system and hardware teams to capture requirements and debug issues. Work statement is a non-managerial role, non-leadership role.
PREFERRED QUALIFICATIONS (DESIRED SKILLS/EXPERIENCE): 2+ years (Associate) or 5+ years (Experienced) verification experience. Experience with hardware emulators (e.g., Palladium) and FPGA prototyping. Knowledge of high-speed SerDes (PCIe, Ethernet, JESD204C). Experience with SVA (SystemVerilog Assertions) and RTL-to-GDS flows. Familiar with space/radiation mitigation techniques is a plus.
REQUIRED EDUCATION: Minimum of a Bachelor of Science degree from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 9 or more years' related work experience (e.g. PhD+4 years' related work experience, Master+7 years' related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
WORK HOURS: FULL TIME/FIRST SHIFT;8:00 AM - 5:00 PM
Job Number:
217739
Job Location:
Mountain View, CA
Rate:
Up to $90.65 DOE
Duration:
12 Months
Input Date:
04/07/2026
Firm Name:
CHIPTON ROSS
Attention:
Terry Jones
Address:
420 CULVER BLVD
City, State:
PLAYA DEL REY, CA 90293
Phone:
310/414-7800 X286
800 Phone:
800/927-9318
Fax Phone:
310/414-7808
Email:tjones@chiptonross.com Website:www.chiptonross.com