Job Listing Description

FPGA/ASIC Front-end Design-Secret, Baltimore MD 21240

Description:
PDS Tech, Inc. is seeking a FPGA/ASIC Front-End Designer with an Active DoD Secret Clearance in Linthicum, MD 21240. Contact Elisabeth Laspe for details. 314-669-8020 elaspe@pdstech.com
36 month contract.  Must have an Active Secret Clearance to qualify.  
Basic Qualifications:

-BS in Electrical Engineering, Computer Engineering, or comparable engineering discipline
-9+ years of relevant experience (7+ years with an MS, 4+ years with a PhD)
-Experience with full product life cycle (requirements, design, implementation and test) of FPGA Design and/or ASIC Design
-Working knowledge of digital signal processing and digital interfaces
-Experience leading a small project team to successfully complete ASIC Design or FPGA design
-Be able to work in teams and communicate clearly across various levels of management and engineers
-US Citizenship with an Active Secret Security Clearance

 
Preferred Qualifications:

-MS in Electrical Engineering, Computer Engineering, or comparable engineering discipline
-Experience with MatLAB, Mentor Graphics design tools, Synopsys or similar tools
-Familiarity with Xilinx, Altera, and/or Actel FPGA technology
-2+ years of experience working with Digital Signal Processing Algorithms and implementation

-Active DOD Top Secret Clearance


 
Job Number: 1710072505
Job Location: Baltimore, MD
Duration: 36 months
Input Date: 12/12/2017
Firm Name: PDS TECHNICAL SERVICES
Attention: Elisabeth Laspe
Address: 1215 FERN RIDGE PKWY STE 231
City, State: ST LOUIS, MO 63141
Phone: 314/628-9143
800 Phone: 800/472-3737
Fax Phone: 314/628-9485
Email: cecjstlouis@pdstech.com
Website: http://jobs.pdstech.com/job-detail?id=a1i500000023B5HAAU&URLSource=cjhunter

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