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THIS JOB IS NO LONGER AVAILABLE. THIS IS ARCHIVAL INFORMATION.
FPGA Design Engineer

Description:
The FPGA DSP Design Engineer will perform the following:
• FPGA design process including preliminary design, peer reviews, detailed design, test plan generation, and integration and test.
• Experience with fixed-point digital math functions and implementations, floating point data structures, and control theory (feedback systems and tracking)
• Experience with Digital Signal Processing operations and optimization (FIR filters, Up/Down sampling, convolution, correlations…)
• Proficiency in MATLAB; able to implement algorithms in FPGAs from MATLAB code
• Solid understanding of signal processing concepts
• Utilize basic digital logic design concepts; understanding how VHDL code translates into logic primitives within an FPGA
• Static timing analysis and the process by which timing closure is achieved in a design
• Experience with Cadence Incisive Enterprise Simulator; familiar with Subversion, Python, or Perl
• Work closely with the engineering teams through design, implementation, integration, testing, and qualification of the deliverable system
• Must be able to work independently
• Ability to work in a team environment and negotiate solutions with Hardware / Software Engineering

Job Number: 18-34276
Job Location: Palm Bay, FL
Rate: 70-90
Per Diem: SPLIT
Overtime: YES
Duration: LT
Start Date: ASAP
Input Date: 11/14/2020

Firm Name: NESCO RESOURCE
Attention: Paul Chacon
Address: 101 COMMERCE ST STE 3001
City, State: LAKE MARY, FL 32746
Phone: 407/710-8000
Fax Phone: 407/710-8001
Website: www.nescoresource.com


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